Publication details
Hardware Acceleration for Cyber Security
| Authors | |
|---|---|
| Year of publication | 2010 |
| Type | Article in Proceedings |
| Conference | IST-091 - Information Assurance and Cyber Defence |
| MU Faculty or unit | |
| Citation | |
| Web | http://www.rto.nato.int/Pubs/rdp.asp?RDP=RTO-MP-IST-091 |
| Field | Informatics |
| Keywords | COMBO; FPGA; hardware-acceleration; NIFIC; NETCONF; network monitoring |
| Description | These days the problem of cyber security is of utmost importance. Massive cyber attacks targeting government and mission critical servers can swiftly become an issue of national security. Various approaches for cyber defence and cyber security used to date have been based on software solutions without hardware acceleration. With the increasing number of network users, services and the current generation of multi-gigabit network links, the amount of transferred data has increased significantly. These facts have rendered many current solutions for network security obsolete. This paper presents hardware-accelerated system for cyber security. The time and performance critical parts are processed in hardware and only the relevant traffic parts are processed in software. Such approach allows us to use current security tools in multi-gigabit networks under worst-case scenarios like a distributed denial-of-service attacks. |
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